An Adaptive Pattern Recognition Hardware with On-chip Shift Register-based Partial Reconfiguration

Download: PDF.

“An Adaptive Pattern Recognition Hardware with On-chip Shift Register-based Partial Reconfiguration” by H. Kawai, Y. Yamaguchi, M. Yasunaga, K. Glette, and J. Torresen. In Proceedings International Conference on Field-Programmable Technology (ICFPT), 2008, pp. 169-176.

Download: PDF.

BibTeX entry:

@inproceedings{Kaw08,
   author = {H. Kawai and Y. Yamaguchi and M. Yasunaga and K. Glette and
	J. Torresen},
   title = {An Adaptive Pattern Recognition Hardware with On-chip Shift
	Register-based Partial Reconfiguration},
   booktitle = {Proceedings International Conference on Field-Programmable
	Technology (ICFPT)},
   pages = {169--176},
   publisher = {IEEE CS Press},
   year = {2008}
}

(This webpage was created with bibtex2web.)

Back to publications.