High-Speed Context Switching on FPGAs

 

FPGAs provide thousands of simple configurable logic blocks combined with a programmable interconnect network to implement virtually any digital circuit. The circuitry on the FPGA is defined by configuration data that may be exchanged arbitrarily at runtime.

The purpose of this master thesis is to design a configuration manager for rapidly swapping modules over time. For task preemption, this implies that the execution of a module is stopped and its present state (e.g., all register values) is moved to a memory. Respectively, for resuming the module, the configuration of a module has to be reloaded to the FPGA and the internal state has to be restored, before starting execution.

 

In order to allow high speed context switchingy, techniques must be developed for extracting the state from configuration data that is read from an FPGA, as well as techniques allowing for setting the register values of a module. For performance reasons, these functions should be performed by a dedicated hardware module.

 

Prerequisites: INF1400, INF 2270, INF3430/4430, INF5430
Apportionment: Theory (15%), Concepts (25%), Implementation HW/SW (50%/10%)
Supervisors: Dirk Koch, Jim Tørresen

 

 

 

Tags: High-Speed Context Switching on FPGAs
Published Aug. 1, 2011 4:12 AM - Last modified Oct. 24, 2011 9:34 PM