Abstract
Reconfigurable hardware allows application specific customization of soft microprocessors. Techniques such as removing unused instructions, software emulation of instructions, custom instruction set extensions, and run-time reconfigurable instructions have been suggested. However, the techniques have largely been studied separately from each other. The contribution of this paper is a classification method enabling integration of these techniques. This allows for generating an application specific microprocessor based system from a given program. The generated microprocessor is optimized with respect to performance per area. The improvement of our methodology is demonstrated for the CoreBench benchmark. The benefit of combining the removal of unused instructions (ISA subsetting) with software emulation of rarely used instructions is shown to increase performance while at the same time reducing resource requirements. Improvement in both area and performance is accomplished thorough simplifying the design allowing an increase in clock frequency for the synthesized soft CPU. Optimizing only by using custom instructions allowed a 12% increase in performance, but also increased resource usage by 6%. Software emulation combined with ISA subsetting allowed area savings of 7%, but only improved performance by 3%. By combining custom instructions, software emulation and ISA subsetting, we achieved an performance improvement of 15% while at the same time reducing resource requirements.
Bibtex
@INPROCEEDINGS{DDECS12wold,
AUTHOR = {{Wold}, {Alexander} and {Koch}, {Dirk} and {Jim}, {Torresen}},
BOOKTITLE = {15th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)},
PUBLISHER = {IEEE Computer Society},
TITLE = {{Design Techniques for Increasing Performance and Resource Utilization of Reconfigurable Soft CPUs}},
year = 2012,
month = April,
pages = {50--55},
location = {Tallinn, Estonia}
}