No-Break Dynamic Defragmentation of Reconfigurable Devices
Abstract
We propose a new method for defragmenting the modulelayout of a reconfigurable device, enabled by a novel approach for dealing with communication needs between relocated modules and with inhomogeneities found in commonly used FPGAs.
Our method is based on dynamic relocation of module positions during runtime, with only very little reconfiguration overhead; the objective is to maximize the length of contiguous free space that is available for new modules.
We describe a number of algorithmic aspects of good defragmentation, and present an optimization method based on tabu search.
Experimental results indicate that we can improve the quality of module layout by roughly 50% over static layout.
Among other benefits, this improvement avoids unnecessary rejection of modules.
Bibtex
@inproceedings{fpl08fekete,
address = {Heidelberg, Germany},
title = {No-Break Dynamic Defragmentation of Reconfigurable Devices},
isbn = {978-1-4244-1960-9},
doi = {10.1109/FPL.2008.4629917},
booktitle = {Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on},
journal = {Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on},
author = {S.P. Fekete and T. Kamphans and N. Schweer and C. Tessars and J.C. van der Veen and J. Angermeier and D. Koch and J. Teich},
pages = {113--118},
month = sep,
year = {2008},
keywords = {field programmable gate arrays,FPGA,integrated circuit layout,logic design,no-break dynamic defragmentation,reconfigurable devices},
},