Routing Optimizations for Component-based System Design and Partial Run-time Reconfiguration on FPGAs

Routing Optimizations for Component-based System Design and Partial Run-time Reconfiguration on FPGAs

Abstract

In component-based system design, systems are composed by integrating fully physically implemented hard-IP cores. This design style has the potential to close the design productivity gap that will arise when FPGAs will head over the one million look-up table boundary by minimizing, or even fully removing, costly verification and place & route steps during the system integration phase. This integration can even be carried out at run-time, and consequently, making component-based design the base for implementing partially reconfigurable systems.

In this paper, we will discuss requirements on the routing of the components such that modules can be composed to systems without interfering among each other while still being able of providing the top-level component to component communication. We will propose to relax the strict bounding box constraints that have been traditionally applied to implement reconfigurable components.
Our results will demonstrate an area and reconfiguration time improvement of up to 33% as compared to the traditional strict bounding box method in a case study using Xilinx Spartan-6 FPGAs.

Bibtex

@INPROCEEDINGS{fpt10koch2,
        AUTHOR             = {{Koch}, {Dirk} and {Torresen}, {Jim}},
        ADDRESS            = {{Beijing, China}},
        BOOKTITLE          = {{Proceedings of International Conference on Field-Programmable Technology (ICFPT\'10)}},
        PUBLISHER          = {IEEE},
        MONTH              = dez,
        NOTE               = {to apear},
        TITLE              = {{Routing Optimizations for Component-based System Design and Partial Run-time Reconfiguration on FPGAs}},
        YEAR               = {2010},
}